Makefile: use $(CC) instead of hardcoding gcc
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1 changed files with 3 additions and 2 deletions
5
Makefile
5
Makefile
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@ -1,11 +1,12 @@
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.POSIX:
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PREFIX = /usr/local
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CC = gcc
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dwmblocks: dwmblocks.o
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gcc dwmblocks.o -lX11 -o dwmblocks
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$(CC) dwmblocks.o -lX11 -o dwmblocks
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dwmblocks.o: dwmblocks.c config.h
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gcc -c -lX11 dwmblocks.c
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$(CC) -c dwmblocks.c
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clean:
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rm -f *.o *.gch dwmblocks
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install: dwmblocks
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